| •CPU and storage |
-Up to 2 channels of I2S: 1 channel of voice output port, 1 channel of voice input port |
| -1 ARM Cortex M0 core |
•Power management |
| -64 KB SRAM: 32KB IRAM and 32KB DRAM |
-Single power supply can optimize the power consumption of integrated |
| Support external SPINOR Flash for storing applications, |
system and reduce peripheral components |
| neural network models and user data |
-Internal integration of DCDC, LDO, POR and other power management modules |
| •Low power consumption: standby monitoring current is less than 100uA |
to ensure stable and efficient power supply system |
| (digital microphone)/150uA (analog microphone) |
•Clock management |
| •Dedicated neural network |
-Support 32.768 kHz crystal oscillator, no crystal, numerical control oscillation, |
| -low power consumption |
external input and other clock supply modes |
| -Near memory |
-Internally integrated numerical control oscillator (DCO and LPO) and digital frequency |
| -Automatic noise elimination |
lock loop (ADPLL), supporting intermittent clock calibration function |
| -Speech recognition |
•System peripherals |
| -Support offline voiceprint recording and recognition |
-At most two SPI (one master and one slave), SPI slave can directly access registers |
| -Supports up to 2 wake-up words and 60 command words |
-Up to two I2C channels (one master and one slave), |
| •Audio interface |
supporting external I2C sensors and direct access to registers |
| -2-way 14 bit audio ADC, with low-power programmable gain amplifier |
-Up to two UARTs can be loaded and upgraded through the serial port |
| and low-noise programmable microphone bias power |
-Up to 2-way timer |
| -Support voice activity monitoring (VAD), compatible with MEMS microphone |
-Up to 4 PWM outputs |
| and bone voiceprint |
-Up to 24 multi-functional GPIOs |
| -Up to 2-way PDM, supporting two-way digital microphone |
•Support deep sleep mode, which can be awakened by external interrupt |
